RISC-V Architecture · Open ISA
Open Source

NODESTARK

Minimal RISC-V Virtual Machines. On Demand.

Custom-built with Buildroot. Ultra-small footprint. Runs anywhere from QEMU to bare-metal ESP32.

2.7MB Kernel Image
8MB Root FS
ESP32 Compatible
BRT Buildroot
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2.7 MB kernel image
8 MB root filesystem
<2s Boot time
RV32 RISC-V 32-bit ISA

Built for the Edge

Every NodeStark VM is crafted for maximum efficiency — stripped to the bone, optimized for your exact use case.

Ultra-Minimal Footprint

2.7MB kernel + 8MB rootfs. No bloat, no unused modules. Every byte earns its place through aggressive Buildroot configuration.

Image size vs standard Linux 97% smaller
🏗️

RISC-V Architecture

Open ISA, no licensing fees. RV32IMAC instruction set — integer, multiply, atomic, compressed. Perfect for embedded targets.

arch/risc-v/config
ISA = RV32IMAC
ABI = ilp32
🔧

Buildroot Powered

Reproducible builds from source. Custom toolchain, minimal BusyBox config, stripped libraries. Deterministic output every time.

make riscv32_nodestark_defconfig
Buildroot 2026.02.2
→ kernel 2.7M ✓
→ rootfs 8.0M ✓
📡

ESP32 Compatible

Runs inside TinyEMU or custom RISC-V emulators on the ESP32. Combine WiFi/BLE with a real Linux-class RISC-V environment.

ESP
VM
🎯

Custom On-Demand

Define your packages, kernel options, and init system. We generate a bespoke defconfig and build a VM tailored to your exact requirements.

busybox
dropbear
musl libc
custom init
🛡️

Production Ready

Hardened kernel config, read-only rootfs option, overlay support, and watchdog integration. Reliable for IoT deployments.

hardened ro-rootfs watchdog

From Config to Boot

Four steps. Zero friction. Your VM ready in minutes.

Buildroot Pipeline
01

Define Requirements

Tell us your target platform, required packages, storage constraints, and boot behavior. We translate that into a precise Buildroot defconfig.

target: esp32 / qemu / sifive
packages: busybox, dropbear, python3
rootfs: squashfs / ext4 / overlay
kernel: 5.15 / 6.1 / 6.6
02

Configure & Build

NodeStark runs a full Buildroot toolchain build: cross-compiler, kernel, BusyBox, and all dependencies. Tree-shake everything unused.

make BR2_EXTERNAL=nodestark riscv32_defconfig
make -j$(nproc)
>>> Building cross-toolchain...
>>> Compiling Linux 6.6...
✓ output/images/vmlinux 2.7M
✓ output/images/rootfs.ext4 8M
03

Optimize & Package

Strip debug symbols, compress with LZ4/ZSTD, validate boot sequence on QEMU. Deliver signed images with checksums.

strip
debug symbols
compress
LZ4 / ZSTD
validate
QEMU boot test
sign
SHA256 checksum
04

Receive & Deploy

Download your artifacts. Flash to ESP32-S3 via LittleFS, mount in QEMU, or load into any RISC-V emulator. Boot in under 2 seconds.

esptool.py write_flash 0x0 vmlinux.bin
Flashing... 100% ████████████████
screen /dev/ttyUSB0 115200
NodeStark RISC-V v1.0
Linux 6.6 riscv32

Every Byte Counts

nodestark.spec
Architecture RV32IMAC
Kernel Linux 6.1 / 6.6 LTS
Kernel Image 2.7 MB
Root Filesystem 8 MB
FS Format ext4 / squashfs / cramfs
libc musl / uClibc-ng
Userspace BusyBox 1.36
Build System Buildroot 2026.02.2
Boot Time < 2 seconds
RAM (min) 16 MB
Emulator Custom C emulator / QEMU
Kernel Image 2.7 MB
Root Filesystem 8 MB
Total footprint 10.7 MB
vs ~200MB standard embedded Linux distro
SMP support
MMU enabled
Initramfs
Device tree
Virtio net/blk
UART console
OverlayFS
inotify
namespaces
cgroups v2

Tested Platforms

One image format. Many targets. Zero compromises.

ESP

ESP32

Custom RISC-V emulator in C. ESP32-S3 · 16MB flash · LittleFS + ESP-IDF.

open source
QEMU

QEMU

Full system emulation. x86/ARM64 host → RISC-V guest. CI/dev.

dev / CI
SiFi

SiFive HiFive

Native bare-metal boot on HiFive Unleashed / Unmatched boards.

bare-metal
FPGA

Custom FPGA

Xilinx/Intel FPGA with softcore RISC-V. Custom board bring-up.

custom
ESP32 Board

Running on ESP32

NodeStark developed a custom RISC-V emulator in C for the ESP32-S3 (16MB flash). Linux image — 2.7MB kernel + 8MB rootfs — lives in LittleFS. Firmware built with ESP-IDF. Result: real Linux shell over UART on a $5 chip. → view source on GitHub

1. Create LittleFS image and flash
python littlefs_create.py rootfs.img
esptool.py --chip esp32s3 write_flash 0x300000 rootfs.img
Writing (100%)...
2. Build + flash firmware via ESP-IDF
idf.py flash monitor
NodeStark RISC-V Emulator v1.0
Mounting LittleFS... OK
Loading kernel 2.7MB... OK
Booting Linux 6.6.0-nodestark
~ #

GET YOUR
VM NOW

Tell us your target platform and requirements. We deliver a bespoke RISC-V VM image — tested, optimized, and ready to boot.

~2min to fill
<24h response
free quote

ESP32 Running Linux

Pure C RISC-V emulator for ESP32-S3. Boots Linux with 2.7MB kernel + 8MB rootfs via LittleFS. Open-source project, v1.0 available.

C · 98% ESP-IDF LittleFS ESP32-S3 v1.0